Synopsys, Inc. · NASDAQ:SNPS

Synopsys — Silicon Frontline Technology — Technical Presentation (2015)

24 slides from Synopsys's technical presentation, 2015

1. Slide 1: RMAP – software for resistance verification of power nets and ESD protection structures

   2015 International ESD Workshop RMAP – software for resistance verification of power nets and ESD protection structures Maxim Ershov*, Meruzhan Cadjan*, Yuri Feinberg*, and Thomas Jochum** (*) Silicon Frontline Technology, (**) Intersil Page 1

2. Slide 2: Biography

   Biography Maxim Ershov received M.Sc. degree from Moscow Institute of Physics and Technology, and Ph.D. degree from Russian Academy of Sciences, in solid state electronics. His research interests are in the areas of semiconductor device and interconnects physics, numerical simulation, and parasitic

3. Slide 3: Abstract

   Abstract This paper presents RMAP - a new software tool and methodology for electrical verification of power nets and ESD protection structures. RMAP calculates resistances from the pads to all points on a net, and presents the results as color maps, enabling quick interactive visual inspection. Lay

4. Slide 4: Introduction

   Introduction  Electrical verification of power nets is a complex task  Existing approaches: Visual inspection of large size printouts of power nets (1x1 meter) Use of complex IR drop and EM analysis tools Tedious, time consuming, error prone, require expert user  Layout errors often manifest t

5. Slide 5: Basic functionality of Rmap

   Basic functionality of Rmap  Automated calculation of resistance from pad(s) to each point of a net (all metal layers), minimum input from the user  Presenting results as color maps, for interactive analysis  Quick visual identification of layout problems  Simple setup: define pads  get Rmap pl

6. Slide 6: The concept of resistance mapping

   The concept of resistance mapping  Rmap shows resistance from starting point(s) to every point on a line (net) as a color map 2015 International ESD Workshop Page 6

7. Slide 7: Advantages of Rmap tool

   Advantages of Rmap tool  Fully automated simulation flow, minimum input from user  Ease of setup and use  Layout errors pop up as red color or color gradient  Can be used by any designer and engineer  Can be used early in the design stages and for final sign-off  Synchronization of Rmap view w

8. Slide 8: Layout errors identified by Rmap

   Layout errors identified by Rmap  Too narrow and long metal lines  Missing or insufficient number of vias  Poor connection of pads to power nets  High resistance from pads to ESD devices  Electrical connectivity through high-resistive layers  Color effects revealing potential problems High re

9. Slide 9: Typical applications

   Typical applications  Resistance from pads to various blocks for ground / power nets (or any nets)  Resistance to ESD devices and guard rings  Common resistance problem for several ground nets connected at the pad  Guard ring resistance verification  Verification of IP blocks and their integrat

10. Slide 10: Rmap usage model

    Rmap usage model  Run Rmap simulation From minute to hours, depending on design and resolution  Review text reports for high resistance  Visualize resistance maps with GUI tool (R3DDRAW) Identify high resistance areas Trace color gradients to understand the root causes Optionally, run P2P for

11. Slide 11: Rmap simulation flow

    Rmap simulation flow Layout (GDSII file or CCI database ) Log file Technology file P2P / Rule file Text report file Rmap Pads (start points) Rmap view Input deck  Rmap is one of functionalities of P2P tool  Geometry processing, R extraction, simulation Fully automated 2015 International ESD Works

12. Slide 12: Resistance map analysis

    Resistance map analysis  Hard to analyze  Easy to analyze 2015 International ESD Workshop Page 12

13. Slide 13: Visualizing Rmap results – R3DDRAW

    Vsiualizing Rmap results – R3DDRAW Pads Layers (starting point for R calculations) Color of a point is a measure of Simulated resistance from nets a point to pads  Rmap results are visualized using a GUI-based tool  R3DDRAW enables an interactive analysis of Rmap results 2015 International ESD Wor

14. Slide 14: Tracing resistance paths

    Tracing resistance paths  Tracing resistance color gradient reveals root causes In this case – very long narrow M3 line 2015 International ESD Workshop Page 14

15. Slide 15: Layout improvement process

    Layout improvement process Original Improvement 1 Improvement 2 Rmax=400 Ohm Rmax=180 Ohm Rmax=100 Ohm Horizontal M3 line widened Horizontal and vertical M3 lines widened  Rmap enables a quick optimization and improvement process 2015 International ESD Workshop Page 15

16. Slide 16: ESD device and guard ring verification

    ESD device and guard ring verification Changing resistance range enables quick resistance verification of ESD structures, guard rings, and other blocks 2015 International ESD Workshop Page 16

17. Slide 17: Pad to ESD device resistance – FA data

    Pad to ESD device resistance – FA data  Chip was failing negative HBM stress on one pad  Failure Analysis results: Parasitic diode AGND to PIN is carrying current during ESD zap Metal line connected to AGND is damaged during ESD zap 2015 International ESD Workshop Page 17

18. Slide 18: Pad to ESD device resistance

    Pad to ESD device resistance Reduced resistance  Rmap showed high resistance from pad to ESD diode fingers  Improved metallization reduced resistance to below 0.5 Ohm  Chip passed HBM test 2015 International ESD Workshop Page 18

19. Slide 19: Rmap features

    Rmap features  Several functionalities in one tool: Geometry processing, R extraction, identification of points to be simulated, R simulation, visualization  Minimalistic input Design-specific: pads locations, GDSII layout Pads are defined in input deck or extracted from GDS file Technology-sp

20. Slide 20: Rmap comparison with other tools

    Rmap comparison with other tools Functonality P2P / Rmap Other tools Port-to-port resistance calculation Yes Yes DC IR / EM analysis Yes Yes Transient IR drop analysis No Yes Rmap plots Yes No Easy to set up and use Yes No Can be used by layout engineers Yes No Requires LVS-clean design No Yes Multi

21. Slide 21: Rmap limitations

    Rmap limitations  Rmap captures problems that are revealed by resistance color  Problems that may be missed by Rmap Current density hot spots not leading to high resistance Short narrow segments in metal lines (see next slide) One via instead of via array – small R, but high current density  R

22. Slide 22: Rmap versus current density plots

    Rmap versus current density plots Layout Rmap [Ohm] Current density (P2P) [A/um] A B C  Current density hot spots may not reveal themselves in Rmap Layout B - short narrowing – no abrupt color change in Rmap Layout C – longer narrowing shows up as color discontinuity  Current flow / P2P simulati

23. Slide 23: Conclusions

    Conclusions  Rmap – a new software tool for of power nets verification is presented  Rmap enables quick visual approach for power net analysis  Resistances from pads to each point on power net are calculated and presented as color plots, over the layout  Majority of layout problems can be identi

24. Slide 24: References

    References  ESDA report: ESD TR18.0.01-14 – ESD Electronic Design Automation Checks  http://www.esda.org/Documents.html  M. Ershov, Y. Feinberg, M. Cadjan, D. Klein, and M. Etherton, “EDA software for verification of metal interconnects in ESD protection networks at chip, block, and cell level”,

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