Axcelis Technologies, Inc. · NASDAQ:ACLS
Axcelis Technologies — ASMC 2026 Advanced Semiconductor Manufacturing Conference
21 slides from Axcelis Technologies's conference presentation, May 2026
Slide 1: ASMC 2026 Advanced Semiconductor Manufacturing Conference
ASMC 2026 ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE MAY 11–14 | HILTON ALBANY, ALBANY, NY
Slide 2: Analysis of Resistance Performance of High Dose Boron Doping
Analysis of Resistance Performance of High Dose Boron Doping Main Author: Lee Chea Hui Co Authors: Bohesharvind Naraiyanan Murthi, Chen Hank, Zhang Wan Chun & Rubin Leonard
Slide 3: Presenter's Biography
Presenter’s Biography ▪ Bachelor Degree (Hons.) in Chemical Engineering (USM 2022) ▪ Joined Infineon Technologies (Kulim) Sdn. Bhd. in Sep 2022. ▪ 4 years of experience in the semiconductor industry. ▪ Responsible for qualifying next-generation high-current implanters (Si Purion H200 RT and Si Purio
Slide 4: Table of contents
Table of contents 1 Introduction 2 Experimental Setup 3 Results & Discussion 4 Summary 5 References
Slide 5: Introduction
Introduction • Single wafer high current implanters are replacing 2 Tool model Axcelis Purion H200 Axcelis GSD200E 13 wafer high current batch implanters due to: Tool type Single wafer implanter 13 wafer batch implanter – Reduced particle contamination Horizontal Spot beam is scanned and Spot beam i
Slide 6: Introduction
Introduction • Problem statement: – Single wafer implanter demonstrates lower sheet resistance on the polysilicon in comparison to the batch wafer implanter Delta: ~ 70 Dose % • Objective: – Match the sheet resistance performance within 1 sigma difference with minimal recipe changes – Enable the sin
Slide 7: Introduction
Introduction Previous Literature: Dose rate effect • Process matching between a high current single wafer implanter (ribbon beam) and a high current batch wafer implanter (unscanned spot beam) [2] – Single wafer implanters have a higher dose rate due to the differences in end station scanning archit
Slide 8: Introduction
Introduction Present study: • Both tools use a spot beam, but the differences are (1) maximum number of wafers per batch; (2) beam scanning rate; (3) dose rate (beam density effect); (4) implant area • These differences may have contributed to the observed mismatch. Tool type Wafer per Horizontal Be
Slide 9: Introduction
Introduction • DOE splits: beam current, chiller temperature, • Energy split implant mode, and vertical scan speed • Outcome: energy splits had a significant impact • Outcome: unsuccessful on Rs • Scope – Match the sheet resistance performance within 1 sigma by optimizing energy
Slide 10: Experimental Setup
Experimental Setup Experiment • Analysis on test wafer: TEM, SIMS, SRP & RS – Layer stack (from top surface): 5 nm oxide, 200 nm poly, 30 nm oxide & Si substrate – Annealing conditions (RTP): 1047°C, 9 secs & N2 ambient • Analysis on product wafer: RS • DOE split for on both the wafer types as shown
Slide 11: Results and Discussion (test wafers)
Results and Discussion (test wafers) TEM analysis (as-implanted) • Why does a single-wafer implanter produce a thicker amorphous layer? – Higher beam density → shortened defect diffusion and less recombination of mobile defects → shorter relaxation period of mobile defects → damage builds up and ove
Slide 12: Results and Discussion (test wafers)
• . Results and Discussion (test wafers) SIMS Analysis (as-implanted + annealed sample) • As-implanted sample: – Why does the single-wafer implanter show a slightly shallower channeling tail? • Higher beam density → faster damage build up → block channels slightly more for subsequent ions [3] • Anne
Slide 13: Results and Discussion (test wafers)
Results and Discussion (test wafers) SRP analysis (annealed) • Why does single wafer implanter demonstrate better activation percentage? – Greater amorphous layer thickness → more activation via solid phase epitaxy (lower activation energy) → better electrical activation [5] – Greater amorphous laye
Slide 14: Results and Discussion (product wafers)
Results and Discussion (product wafers) Rs analysis (annealed) 𝟏 • 𝑹𝒔 = 𝒙𝒋 0 𝒒𝝁𝑵 𝒙 𝒅𝒙 – 𝑹𝒔 is the sheet resistance – 𝝁 is the charge carrier mobility (holes) – 𝑵 𝒙 is the net activated impurity concentration function of junction depth – 𝑿𝒋 (x) is the junction depth – 𝒒 is the…
Slide 15: Summary
Summary • A difference in beam current density between the single and batch wafer implanters led to a mismatch in electrical performance. • In the past, several studies have been carried out to match performance, including: Approaches Limitations Beam current reduction Low throughout and increased b
Slide 16: References
References 1. V. Kaeppelin, Z. Chalupa, L. Frioulaud, S. Mehta, B. Guo, K. Shim, H. Lendzian and Y. Erokhin, "Process Transferability from a Spot Beam to a Ribbon Beam Implanter: CMOS Device Matching," Proc. XVI Conference on Ion Implantation Technology, pp. 353-356, 2006. 2. K. Shim, Y. Hwang, Y. L
Slide 17: Thank You!
ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE TECHNICAL SPONSORS IEEE PUES Gligue THANK YOU
Slide 18: Appendix
ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE TECHNICAL SPONSORS IEEE PUES Gligue APPENDIX
Slide 19: Impact of amorphous thickness on dopant activation and clustering
Impact of amorphous thickness on dopant activation and clustering (Theory only) • Thicker amorphous layer – Improved electrical activation – Fewer residual defects • Greater solid phase epitaxy annealing (Ea = ~ 2.3 eV) vs standard annealing to get rid of defects and get dopant into substitional sit
Slide 20: Results and Discussion (test wafers)
Results and Discussion (test wafers) Rs (annealed) Beam Beam • At 6 mA, the Rs for single wafer implanter is Rs Mean Std Dev Processing time Tool Type current density approximately 6 ohm/sq lower than the batch wafer (Ohm/sq) (%) (s) (mA) (mA/m2) implanter • Rs was matched (within 1 sigma) under Bat
Slide 21: Advanced Semiconductor Manufacturing Conference
ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE
Axcelis Technologies — ASMC 2026 Advanced Semiconductor Manufacturing Conference on 6ix