Rambus, Inc. · NASDAQ:RMBS

Rambus — Q3 2026 Earnings Presentation

30 slides from Rambus's earnings presentation, Oct 26, 2026

  1. Slide 1: Rambus Investor Presentation Q4 2026

    Rambus Investor Presentation Q4 2026

  2. Slide 2: Safe Harbor for Forward-Looking Statements; Other Disclosures

    Safe Harbor for Forward-Looking Statements; Other Disclosures This presentation contains forward-looking statements, including those relating to the Company’s expectations regarding business opportunities, the Company’s ability to deliver long-term profitable growth, industry growth rates, timing of

  3. Slide 3: Record Revenue and Company Key Facts

    Record Revenue $2.51 $708M Diluted Non-GAAP EPS 2025 Revenue Data Center & AI >75% of Chip and $348M Silicon IP Revenue 2025 Product Revenue $360M +25% 2025 Cash from Operations 5-YR CAGR Product Revenue Over 3 Decades San Jose HQ ~800 Employees Technology Leadership Global Footprint >70% in Enginee

  4. Slide 4: Semiconductor Solutions Built on Innovation

    Semiconductor Solutions Built on Innovation Rambus Offerings Markets Served Chips Product Sales Automotive Memory Interface Chips Silicon IP Data Center IP Licenses & Government Interface IP Security IP AI Infrastructure Innovations Patent Licenses \ IoT Foundational R&D and IP 4

  5. Slide 5: Amplified Opportunities in Data Center and AI Infrastructure

    Amplified Opportunities in Data Center and AI Infrastructure Growing memory performance Addressing bandwidth and Broadening adoption of requirements of Agentic AI capacity requirements with novel key technologies into memory solutions adjacent markets Cache Increasing latency and capacity On chip Pe

  6. Slide 6: Rambus Solutions for the Data Center

    Rambus Solutions for the Data Center DDR5 RDIMM Server Motherboard AI Accelerator/GPU Card 2 1 3 4 Rambus Products: Chips 1 Memory Interface Chips: Registering Clock Driver, PMIC, SPD Hub, Temperature Sensor 2 Root of Trust Security IP with Quantum Safe Cryptography Silicon IP 3 HBM/GDDR/LPDDR Memor

  7. Slide 7: Rambus Memory Interface Chips

    DDR5 Server Chipset Rambus Memory Interface Chips Offering chipset solutions for all industry-standard DDR5 and LPDDR5/5X memory modules Expanding portfolio of new products: Complete Chipsets for: Industry-leading DDR5 RCDs • MRCD & MDB 12800 MT/s • RDIMM • CUDIMM • PMICs and Voltage Regulators • MR

  8. Slide 8: Silicon IP Solutions for AI

    Silicon IP Solutions for AI • Critical IP for accelerator, networking and storage chips: HBM, GDDR, LPDDR, PCIe, CXL, PQC, Root of Trust, IME/IDE, MACsec, IPsec and UET-TSS • Key Benefits • Delivers industry-leading bandwidth performance • Enables high-speed connectivity between devices Interface IP

  9. Slide 9: Rambus Uniquely Positioned for Novel Memory Solutions

    Rambus Uniquely Positioned for Novel Memory Solutions Industry leading performance to 12800 MT/s (MRDIMM) Industry Leadership and 9600 MT/s (RDIMM) for DDR5-based servers and PCs DDR5 Memory Interface Chipset HB M 4 E M e m or y S ub sy st em World-class expertise in memory interface and Core Expert

  10. Slide 10: Product Leadership Driving Long-term Growth

    Product Leadership Driving Long-term Growth DDR5 & LPDDR5/5X memory module chipsets delivering industry-leading performance z Critical interface IP for AI: 2020-2025 z HBM & GDDR controllers; PCIe controller, switch & retimer 25% Product Revenue Broadest portfolio of secure root of trust, protocol e

  11. Slide 11: Financial Highlights

    Financial Highlights Product Revenue* ($M) Pro Forma Operating Expenses ($M) 249 218 217 348 82 77 76 225 247 167 141 146 2023 2024 2025 2023 2024 2025 *Consisting Primarily of Memory Interface Chips R&D SG&A Cash from Operations ($M) & FCF per Share ($) Cash Equivalents & Return of Capital ($M) 400

  12. Slide 12: Rambus Investment Summary

    Rambus Investment Summary  AI-driven data center growth expands long-term market opportunity  Broad portfolio of high-performance chips and silicon IP enables critical performance improvements for AI and advanced workloads  Innovation feeds sustained product leadership and strong patent portfolio

  13. Slide 13: Detailed Financials

    Detailed Financials Strong cash generation fuels growth initiatives and return of value to stockholders

  14. Slide 14: Q3 2026 Non-GAAP Income Summary

    Q3 2026 Non-GAAP Income Summary In Millions, except EPS Q3 2025 Q4 2025 Q1 2026 Q2 2026 Q3 2026 Revenue $178.5 $190.2 $180.2 $207.4 $218.3 Achieved record quarterly revenue Total Operating Costs and Continued investment to support core $99.3 $103.2 $104.6 $113.7 $116.1 Expenses (1, 2) growth initiat

  15. Slide 15: Q3 2026 Balance Sheet Summary

    Q3 2026 Balance Sheet Summary In Millions Q3 2025 Q4 2025 Q1 2026 Q2 2026 Q3 2026 Total Cash & Marketable $135M of total capital returned to stockholders in $673.3 $761.8 $786.1 $824.9 $776.9 Securities Q3, including $100M Accelerated Share Repurchase Total Assets $1,406.4 $1,529.5 $1,533.1 $1,612.3

  16. Slide 16: Reconciliation of GAAP to Non-GAAP Financial Measures

    Reconciliation of GAAP to Non-GAAP Financial Measures Operating Income in Millions, except EPS Q3 2025 Q4 2025 Q1 2026 Q2 2026 Q3 2026 GAAP Operating Income $63 $71 $62 $73 $84 Adjustments: Stock-based compensation 14 14 11 16 17 Amortization of acquired intangible assets 2 2 2 2 1 Restructuring and

  17. Slide 17: Reconciliation of GAAP to Non-GAAP Income Statement

    Reconciliation of GAAP to Non-GAAP Income Statement GAAP Non-GAAP Delta In Millions, except EPS Actual Actual to Q3 2026 Q3 2026 GAAP Revenue $218.3 $218.3 $- Cost of revenue 47.4 46.0 (1.3) Research and development 49.4 43.2 (6.2) Sales, general and administrative 37.7 26.9 (10.8) Restructuring cha

  18. Slide 18: Product Overview

    Product Overview Industry-leading Chips and Silicon IP

  19. Slide 19: Chips

    Chips Server Module Chipsets Providing memory bandwidth, • DDR5 RDIMM capacity, and power efficiency to • DDR5 MRDIMM unleash the performance of • LPDDR5X SOCAMM2 CPUs and accelerators Client Module Chipsets • DDR5 CU/CSODIMM • LPDDR5 LPCAMM2 Chips Silicon IP Innovations 19

  20. Slide 20: DDR5 RDIMM Chipset

    DDR5 RDIMM Chipset Industry-leading Performance and Margin • Compliant with latest JEDEC spec up to 9600 MT/s • Wide margin IO design with advanced programmability • Exceeds JEDEC reliability requirements Optimized Power • Frequency-based power optimization Best-in-class Debug and Serviceability • I

  21. Slide 21: DDR5 MRDIMM 12800 Chipset

    DDR5 MRDIMM 12800 Chipset Leading Performance • Supports industry-standard MRDIMM 12800 • Full chipset solution • Advanced clocking, control and power management • Supports standard and tall (high capacity) form factors • Common architecture with RDIMM 8000+ to allow flexibility and scalability in s

  22. Slide 22: LPDDR5X SOCAMM2 Server Module Chipset

    LPDDR5X SOCAMM2 Server Module Chipset • Full chipset for JEDEC-standard LPDDR5X SOCAMM2 • Supports data rates up to 9.6 Gb/s • Provides module configuration, telemetry, and localized, efficient power conversion • Enables AI data center performance scaling in a low-power, high-bandwidth, compact form

  23. Slide 23: LPCAMM2 Memory Module Chipset

    LPCAMM2 Memory Module Chipset  Supports wide range of PC performance and capacity use cases  Supports data rates to 10666 MT/s  I2C and I3C Basic bus serial interface  Excellent power conversion efficiency  Programmability features for customization LPCAMM2 Module with PMIC5200 and SPD Hub 23

  24. Slide 24: DDR5 CSODIMM/CUDIMM Chipsets

    DDR5 CSODIMM/CUDIMM Chipsets  Support wide range of PC performance and capacity use cases  Support data rates to 9600 MT/s  I2C and I3C Basic bus serial interface  Excellent power conversion efficiency  Programmability features for customization DDR5 CSODIMM with Client Clock Driver, PMIC5120 a

  25. Slide 25: Silicon IP

    Interface IP • HBM Silicon IP • • GDDR LPDDR Enabling accelerated computing • PCI Express with high-performance interfaces and hardware-level security • CXL Security IP • Root of Trust • MACsec • IPsec • UET-TSS Chips • IME Silicon IP Innovations

  26. Slide 26: Interface IP: Memory Interface and Interconnect IP

    Interface IP: Memory Interface and Interconnect IP Video Memory Controllers Interconnect Controllers Compression DDR LPDDR GDDR HBM CXL PCI Express VESA FEC Application DSC/ DP/ 4 4X/5X/5T 6/7 2/2E 3/3E 4/4E 2.0 3.2 5.0 6.3 7.0 VDC-M HDMI Focus Data Center / AI Infra. Edge Automotive Government & De

  27. Slide 27: Security IP: Protecting Data at Rest, in Motion, and in Use

    Security IP: Protecting Data at Rest, in Motion, and in Use Cipher Root of Trust Network Security Crypto Cores Provisioning Engines Application Firmware IPsec Key Programmable MACsec UET-TSS IME Crypto TRNG Infrastructure Focus Controlled TLS Management Data Center N/A / AI Infra. Edge Automotive N/

  28. Slide 28: Rambus Labs

    Next-Gen Memory Rambus Labs Enabling next-generation data centers through innovation, Post-Quantum research and development Computing Security Chips Silicon IP Innovations

  29. Slide 29: Key Areas of Focus for Rambus Labs

    Key Areas of Focus for Rambus Labs Security for AI/ML Next-Gen Memory Secure and Reliable Strategic Customer & and Post-Quantum Architectures and Memory Systems Product Roadmap Computing Performance Support 29

  30. Slide 30: Thank you

    je — Thank you~.

Rambus — Q3 2026 Earnings Presentation on 6ix