Macronix International Co., Ltd. · TWSE:2337
Macronix International — Technical Presentation (May 2005)
9 slides from Macronix International's technical presentation, May 2005
Slide 1: Macronix NBit Technology
Macronix NBitTM Technology May, 2005 1
Slide 2: ETOX Floating-gate
ETOX Floating-gate Cross-section Top view X-Direction PL1 DF1 STI PL2 WSi PL2 Contact PL1 STI Unit Cell Drain SL(source) Y-Direction • Program: channel hot-electron injection • Erase: channel F-N erase Not as simple as NBit cell structure 3
Slide 3: Macronix NBit Technology
Macronix NBitTM Technology Cross-section Top view Oxide- Nitride- Polycide gate Oxide Bit 2 Bit 1 Stack BD oxide p+ Pocket Polycide wordline Implant Buried diffusion • program: channel hot-electron injection • erase: band-to-band tunneling Buried diffusion bitline • read: reverse read • Macronix NBi
Slide 4: NBit's technological edge
NBitTM’s technological edge • No floating gate: simple process, easier to scale down, shorten process development time • Virtual ground flat cell: compact cell size, no isolation inside array, no difficult self-aligned source process, no contact to gate isolation issue • Local traps for charge stora
Slide 5: NBit vs. Floating Gate Technology Comparison
NBitTM vs. Floating Gate Technology Comparison Floating Gate Storage NBitTM - Nitride Storage Poly 2 SiO2 ONO Si3N4 SiO2 Poly SiO2 Poly 1 Si3N4 SiO2 Tunnel Oxide BD Oxide Source Drain Drain Source PGM: CHE injection PGM: CHE injection Erase: FN tunneling Erase: HH injection Read: Normal Read Read: R
Slide 6: NBit Comparison with Floating gate MLC 2 bits
NBitTM Introduction- NBitTM Comparison with Floating gate MLC 2 bits NBitTM Erase Bit “1” Program Bit “0” Poly ONO BD Oxide Drain Source 0V Sensing Vt(Volts) Reference Multi-Level Cell Poly 2 SiO2 11 10 01 00 2 bits ONO Si3N4 SiO2 Poly 1 Tunnel Oxide Source Drain 0V Sensing Sensing Sensing Vt(Volts)
Slide 7: NBit 4 bits/cell vs. MLC 3 bits/cell
NBitTM 4 bits/cell vs. MLC 3 bits/cell 2 * 2 bits = 4 bits NBitTM 11 10 01 00 Poly ONO BD Oxide Drain Source 0V Sensing Sensing Sensing Vt(Volts) Reference Reference Reference 1 2 3 Multi-Level Cell 111 110 101 100 011 010 001 000 3 bits Poly 2 SiO2 ONO Si3N4 SiO2 Poly 1 Tunnel Oxide Source Drain 0V
Slide 8: Cell Size and Process Complexity of NBit vs. Floating-gate Technology
Cell Size and Process Complexity of NBitTM vs. Floating-gate Technology Cell Size Ratio of Masking (per bit) Layers Floating gate(SLC) 10 F2 100% Floating gate(MLC) 5 F2 100% NBitTM (MBC) 4 F2 ~ 70% * F is the feature size of a technology node 9
Slide 9: NBit Comparison With MLC & Single Bit
NBitTM Comparison With MLC & Single Bit MXIC NBitTM(2bits/cell) Multi Level Cell(2bits/cell) Conventional Flash Gate Gate Gate Selectable Selectable 00 01 Source/Drain Storage Source/Drain 10 Storage Element Storage Element Bit A Element Bit B Source 11 Source Drain Drain NBitTM MLC Conventional Fla
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